Welcome to Ours Technology

Optical Universal RISC Systems

About Us

OURS Technology is a Silicon Valley VC-backed startup founded by PhDs from Berkeley ASPIRE lab. We are building system sensor fusion solutions with our custom silicon for future autonomous driving and robotic applications.

When continued scaling is no longer possible, we believe new energy efficient architecture and advanced sensors along with full-stack hardware/software co-design is the future to transform industries.

Our team is led by Dr. Zhangxi Tan, who was a founding engineer of Pure Storage (NYSE:PSTG).

Current Openings

We are looking for people who share our passion, our drive, our commitment, and our abilities. All open positions afford unparalleled opportunities for personal and career growth. If you are interested in joining us, please send your resume to careers@ours-tech.com

Here are just a few benefits of working at OURS:

  • Working with a great set of engineers. More than 80% of the current team members have a PhD from Berkeley.
  • Hands-on guidance from silicon valley veterans with more than 20 years of production silicon experience.
  • Learn to build a product from scratch that provides value for our customers.
  • Meaningful equity with competitive startup salary
  • Unlimited PTO. Take a break when you feel you need to. Our philosophy is to work hard and play hard!
  • Pre-tax commuter benefit
  • Health insurance
  • Free lunch
  • 401k program

Low-power CPU data path and memory system designs, microarchitecture and design verification. You will be responsible for building chip design infrastructure, architecture/microarchitecture design as well as pre/post-silicon verifications and bring ups.


  • 1. Extensive knowledge on microprocessor architecture and digital circuit designs
  • 2. Experience in FPGA/ASIC logic synthesis and simulation tools, such as VCS, Primetime, DC
  • 3. Familiar with timing and power analysis
  • 4. Knowledge on analog circuit, low-power designs, clock and power gating
  • 5. Extensive FPGA/ASIC design experience with Verilog/Systemverilog
  • 6. Experience in scripting languages, e.g. Python, Perl and etc.
  • 7. Master in CS/EE with relevant project background


  • 1. Experience in production silicon tape-out
  • 2. Experience in working with backend design services
  • 3. Experience in IP integration, memory compiler
  • 4. 5+ years industry experience, lead designers of production chips
  • 5. Functional language programming with Scala

Contact Us

4701 Patrick Henry Dr #18
Santa Clara, CA 95054